? semiconductor components industries, llc, 2000 november, 2000 rev. 1 1 publication order number: mlp2n06cl/d mlp2n06cl preferred device smartdiscretes mosfet 2 amps, 62 volts, logic level nchannel to220 this logic level power mosfet features current limiting for short circuit protection, integrated gatesource clamping for esd protection and integral gatedrain clamping for overvoltage protection and sensefet technology for low onresistance. no additional gate series resistance is required when interfacing to the output of a mcu, but a 40 k w gate pulldown resistor is recommended to avoid a floating gate condition. the internal gatesource and gatedrain clamps allow the device to be applied without use of external transient suppression components. the gatesource clamp protects the mosfet input from electrostatic voltage stress up to 2.0 kv. the gatedrain clamp protects the mosfet drain from the avalanche stress that occurs with inductive loads. their unique design provides voltage clamping that is essentially independent of operating temperature. maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit draintosource voltage v dss clamped vdc draintogate voltage (r gs = 1.0 m w ) v dgr clamped vdc gatetosource voltage continuous v gs 10 vdc drain current continuous @ t c = 25 c i d selflimited adc total power dissipation @ t c = 25 c p d 40 watts electrostatic voltage esd 2.0 kv operating and storage temperature range t j , t stg 50 to 150 c thermal characteristics maximum junction temperature t j(max) 150 c thermal resistance junction to case r q jc 3.12 c/w maximum lead temperature for soldering purposes, 1/8 from case for 5 sec. t l 260 c draintosource avalanche characteristics single pulse draintosource avalanche energy (starting t j = 25 c, i d = 2.0 a, l = 40 mh) e as 80 mj l2n06cl llyww 1 gate 3 source 4 drain 2 drain 2 amperes 62 volts (clamped) r ds(on) = 400 m w d g s r1 r2 preferred devices are recommended choices for future use and best overall value. device package shipping ordering information mlp2n06cl to220ab 50 units/rail to220ab case 221a style 5 1 2 3 4 http://onsemi.com nchannel marking diagram & pin assignment l2n06cl = device code ll = location code y = year ww = work week
mlp2n06cl http://onsemi.com 2 electrical characteristics (t c = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics draintosource breakdown voltage (i d = 20 madc, v gs = 0 vdc) (i d = 20 madc, v gs = 0 vdc, t j = 150 c) v (br)dss 58 58 62 62 66 66 vdc zero gate voltage drain current (v ds = 40 vdc, v gs = 0 vdc) (v ds = 40 vdc, v gs = 0 vdc, t j = 150 c) i dss 0.6 6.0 5.0 20 m adc gatesource leakage current (v g = 5.0 vdc, v ds = 0 vdc) (v g = 5.0 vdc, v ds = 0 vdc, t j = 150 c) i gss 0.5 1.0 5.0 20 m adc on characteristics (note 1.) gate threshold voltage (i d = 250 m adc, v ds = v gs ) (i d = 250 m adc, v ds = v gs , t j = 150 c) v gs(th) 1.0 0.6 1.5 1 2.0 1.6 vdc static drain current limit (v gs = 5.0 vdc, v ds = 10 vdc) (v gs = 5.0 vdc, v ds = 10 vdc, t j = 150 c) i d(lim) 3.8 1.6 4.4 2.4 5.2 2.9 adc static draintosource onresistance (i d = 1.0 adc, v gs = 5.0 vdc) (i d = 1.0 adc, v gs = 5.0 vdc, t j = 150 c) r ds(on) 0.3 0.53 0.4 0.7 ohms forward transconductance (i d = 1.0 adc, v ds = 10 vdc) g fs 1.0 1.4 mhos static sourcetodrain diode voltage (i s = 1.0 adc, v gs = 0 vdc) v sd 1.1 1.5 vdc switching characteristics (note 2.) turnon delay time t d(on) 1.0 1.5 m s rise time (v dd = 30 vdc, i d = 1.0 adc, t r 3.0 5.0 turnoff delay time (v dd 30 vdc , i d 1 . 0 adc , v gs(on) = 5.0 vdc, r gs = 25 ohms) t d(off) 5.0 8.0 fall time t f 3.0 5.0 1. pulse test: pulse width 300 m s, duty cycle 2%. 2. switching characteristics are independent of operating junction temperature.
mlp2n06cl http://onsemi.com 3 figure 1. output characteristics figure 2. transfer function v ds , drain-to-source voltage (volts) i d , drain current (amps) i d , drain current (amps) v gs , gate-to-source voltage (volts) t j = 25 c v ds 7.5 v t j = 150 c 25 c -55 c 012 3 8 2.5 2.0 1.5 1.0 0.5 0 3.0 3.5 4.0 4567 02 4 68 5 4 3 2 1 0 6.0 v 5.5 v 5.0 v 4.5 v 4.0 v 3.5 v 3.0 v 2.5 v 2.0 v the smartdiscretes concept from a standard power mosfet process, several active and passive elements can be obtained that provide onchip protection to the basic power device. such elements require only a small increase in silicon area and/or the addition of one masking layer to the process. the resulting device exhibits significant improvements in ruggedness and reliability as well as system cost reduction. the smartdiscretes device functions can now provide an economical alternative to smart power ics for power applications requiring low onresistance, high voltage and high current. these devices are designed for applications that require a rugged power switching device with short circuit protection that can be directly interfaced to a microcontroller unit (mcu). ideal applications include automotive fuel injector driver, incandescent lamp driver or other applications where a high inrush current or a shorted load condition could occur. operation in the current limit mode the amount of time that an unprotected device can withstand the current stress resulting from a shorted load before its maximum junction temperature is exceeded is dependent upon a number of factors that include the amount of heatsinking that is provided, the size or rating of the device, its initial junction temperature, and the supply voltage. without some form of current limiting, a shorted load can raise a device's junction temperature beyond the maximum rated operating temperature in only a few milliseconds. even with no heatsink, the mlp2n06cl can withstand a shorted load powered by an automotive battery (10 to 14 volts) for almost a second if its initial operating temperature is under 100 c. for longer periods of operation in the currentlimited mode, device heatsinking can extend operation from several seconds to indefinitely depending on the amount of heatsinking provided. short circuit protection and the effect of temperature the onchip circuitry of the mlp2n06cl offers an integrated means of protecting the mosfet component from high inrush current or a shorted load. as shown in the schematic diagram, the current limiting feature is provided by an npn transistor and integral resistors r1 and r2. r2 senses the current through the mosfet and forward biases the npn transistor's base as the current increases. as the npn turns on, it begins to pull gate drive current through r1, dropping the gate drive voltage across it, and thus lowering the voltage across the gatetosource of the power mosfet and limiting the current. the current limit is temperature dependent as shown in figure 3, and decreases from about 2.3 amps at 25 c to about 1.3 amps at 150 c. since the mlp2n06cl continues to conduct current and dissipate power during a shorted load condition, it is important to provide sufficient heatsinking to limit the device junction temperature to a maximum of 150 c. the metal current sense resistor r2 adds about 0.4 ohms to the power mosfet's onresistance, but the effect of temperature on the combination is less than on a standard mosfet due to the lower temperature coefficient of r2. the onresistance variation with temperature for gate voltages of 4 and 5 volts is shown in figure 5. backtoback polysilicon diodes between gate and source provide esd protection to greater than 2 kv, hbm. this onchip protection feature eliminates the need for an external zener diode for systems with potentially heavy line transients.
mlp2n06cl http://onsemi.com 4 figure 3. i d(lim) variation with temperature figure 4. r ds(on) variation with gatetosource voltage figure 5. onresistance variation with temperature i d(lim) , drain current (amps) t j , junction temperature ( c) v gs = 5 v v ds = 10 v -50 0 50 100 150 5 4 3 2 1 0 6 r ds(on) , on-resistance (ohms) v gs , gate-to-source voltage (volts) i d = 1 a 01 2 3 910 1.0 0.8 0.6 0.4 0.2 0 456 78 t j = -50 c 100 c 25 c r ds(on) , on-resistance (ohms) t j , junction temperature ( c) i d = 1 a -50 50 0 100 150 0.6 0.4 0.3 0.2 0.1 0 0.5 v gs = 4 v v gs = 5 v figure 6. maximum avalanche energy versus starting junction temperature figure 7. drainsource sustaining voltage variation with temperature t j , starting junction temperature ( c) e as , single pulse drain-to-source i d = 2 a 25 50 75 100 125 150 100 80 60 40 20 0 avalanche energy (mj) b v(dss) , drain-to-source sustaining t j = junction temperature -50 0 150 62.5 62.0 61.5 61.0 60.5 60.0 63.0 63.5 64.0 50 100 voltage (volts) i d = 20 ma
mlp2n06cl http://onsemi.com 5 forward biased safe operating area the fbsoa curves define the maximum draintosource voltage and drain current that a device can safely handle when it is forward biased, or when it is on, or being turned on. because these curves include the limitations of simultaneous high voltage and high current, up to the rating of the device, they are especially useful to designers of linear systems. the curves are based on a case temperature of 25 c and a maximum junction temperature of 150 c. limitations for repetitive pulses at various case temperatures can be determined by using the thermal response curves. on semiconductor application note, an569, atransient thermal resistance general data and its useo provides detailed instructions. maximum dc voltage considerations the maximum draintosource voltage that can be continuously applied across the mlp2n06cl when it is in current limit is a function of the power that must be dissipated. this power is determined by the maximum current limit at maximum rated operating temperature (1.8 a at 150 c) and not the r ds(on) . the maximum voltage can be calculated by the following equation: v supply = (150 t a ) i d(lim) (r q jc + r q ca ) where the value of r q ca is determined by the heatsink that is being used in the application. duty cycle operation when operating in the duty cycle mode, the maximum drain voltage can be increased. the maximum operating temperature is related to the duty cycle (dc) by the following equation: t c = (v ds x i d x dc x r q ca ) + t a the maximum value of v ds applied when operating in a duty cycle mode can be approximated by: v ds = 150 t c i d(lim) x dc x r q jc figure 8. maximum rated forward bias safe operating area (mlp2n06cl) v ds , drain-to-source voltage (volts) , drain current (amps) v gs = 10 v single pulse t c = 25 c dc 10 ms 100 10 1.0 0.1 0.1 1.0 10 1 ms r ds(on) limit thermal limit package limit i d figure 9. thermal response (mlp2n06cl) t, time (s) r(t), normalized effective transient thermal resistance r q jc (t) = r(t) r q jc d curves apply for power pulse train shown read time at t 1 t j(pk) - t c = p (pk) r q jc (t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 0.01 0.1 1.0 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 d = 0.5 0.02 0.2 0.05 0.1 single pulse 0.01
mlp2n06cl http://onsemi.com 6 pulse generator v dd v out v in r gen 50 w z = 50 w 50 w dut r l figure 10. switching test circuit t off output, v out inverted t on t r t d(off) t f t d(on) 90% 90% 10% input, v in 10% 50% 90% 50% pulse width figure 11. switching waveforms active clamping smartdiscretes technology can provide onchip realization of the popular gatetosource and gatetodrain zener d iode clamp elements. until recently, such features have been implemented only with discrete components which consume board space and add system cost. the smartdiscretes technology approach economically melds these features and the power chip with only a slight increase in chip area. in practice, backtoback diode elements are formed in a polysilicon region monolithicly integrated with, but electrically isolated from, the main device structure. each backtoback diode element provides a temperature compensated voltage element of about 7.2 volts. as the polysilicon region is formed on top of silicon dioxide, the diode elements are free from direct interaction with the conduction regions of the power device, thus eliminating parasitic electrical effects while maintaining excellent thermal coupling. to achieve high gatetodrain clamp voltages, several voltage elements are strung together; the mlp2n06cl uses 8 such elements. customarily, two voltage elements are used to provide a 14.4 volt gatetosource voltage clamp. for the mlp2n06cl, the integrated gatetosource voltage elements provide greater than 2.0 kv electrostatic voltage protection. the avalanche voltage of the gatetodrain voltage clamp is set less than that of the power mosfet device. as soon as the draintosource voltage exceeds this avalanche voltage, the resulting gatetodrain zener current builds a gate voltage across the gatetosource impedance, turning on the power device which then conducts the current. since virtually all of the current is carried by the power device, the gatetodrain voltage clamp element may be small in size. this technique of establishing a temperature compensated draintosource sustaining voltage (figure 7) effectively removes the possibility of draintosource avalanche in the power device. the gatetodrain voltage clamp technique is particularly useful for snubbing loads where the inductive energy would otherwise avalanche the power device. an improvement in ruggedness of at least four times has been observed when inductive energy is dissipated in the gatetodrain clamped conduction mode rather than in the more stressful gatetosource avalanche mode. typical applications: injector driver, solenoids, lamps, relay coils the mlp2n06cl has been designed to allow direct interface to the output of a microcontrol unit to control an isolated load. no additional series gate resistance is required, but a 40 k w gate pulldown resistor is recommended to avoid a floating gate condition in the event of an mcu failure. the internal clamps allow the device to be used without any external transistent suppressing components. v dd v bat mlp2n06cl g d s mcu
mlp2n06cl http://onsemi.com 7 package dimensions to220 threelead to220ab case 221a09 issue aa style 5: pin 1. gate 2. drain 3. source 4. drain notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.147 3.61 3.73 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.018 0.025 0.46 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 --- 1.15 --- z --- 0.080 --- 2.04 b q h z l v g n a k f 123 4 d seating plane t c s t u r j
mlp2n06cl http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mlp2n06cl/d smartdiscretes is a trademark of semiconductor components industries, llc (scillc). north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland
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